1. Introduction
Compiler optimisation levels such as -O2 and -O3 are tuned primarily for execution speed on desktop-class processors, and their energy implications on resource-constrained microcontrollers, where memory access and clock-gating behaviour differ substantially, remain comparatively under-studied.
2. Methodology
Five representative embedded workloads, including a digital filter, a matrix multiply kernel and a JSON parser, were compiled under eight combinations of loop unrolling, function inlining, and vectorisation flags using both GCC 12 and LLVM 16 targeting an ARM Cortex-M4 development board, with energy measured via an INA219 current-sense IC sampling at 1kHz during execution.
3. Results
Combining aggressive loop unrolling with function inlining reduced measured energy consumption by up to 22 percent relative to the -O2 baseline across the five workloads, with the matrix multiply kernel showing the largest gain, though the same configuration increased compiled code size by an average of 6 percent, a relevant tradeoff for flash-constrained parts.
4. Conclusion
Energy-aware compiler flag selection can yield meaningful battery-life improvements on microcontroller targets, but code-size tradeoffs must be evaluated per deployment. Future work will explore profile-guided optimisation informed directly by energy measurements.
References
[1] Tiwari V. et al., Power analysis of embedded software, ISLPED, 1994. [2] Lattner C. and Adve V., LLVM: A compilation framework, CGO, 2004.